Meet the team
The Strathclyde SDR Lab is supported by a team of 2 Academic staff,
6 Knowledge Exchange, 3 R&D Engineers and 11 PhD Students.
Prof Bob Stewart
5G Director (Academic)
Bob Stewart is a professor of signal processing. He leads the SDR team on FPGA, RFSoC, and 5G projects. Bob has more than 30 years academic and industry experience and has held industry supported Professor appointments with Xilinx and Mathworks and was the CEO of tech startup Steepest Ascent Ltd (acquired in 2013).
Dr Louise Crockett
RFSoC SDR (Academic)
Louise Crockett is a Senior Teaching Fellow at the University of Strathclyde. She has core R&D expertise in the hardware implementation of DSP and SDR systems implemented on FPGAs, She has written three widely used books, and is principal author of “The Zynq Book” (2014) and “Exploring Zynq MPSoC” (2019) ,and co-author on “SDR using RTL-SDR with MATLAB” books.
Dr David Crawford
5G Projects Manager (KE)
David is the manager and lead on the our core industry partnership 5G projects, including 5GRuralFirst, 5GRailNext, and 5G NewThinking. David has more than 25 years of industry experience previously with Motorola, and Epson Semicondustors.
Malcolm Brew
Principal 5G Engineer (KE)
Malcolm has a responsibility for engineering management and technology integration and design with key industry partners and suppliers of 5G next generation hardware. Malcolm has worked extensively in industry and internationally on communications networks.
Dr Douglas Allan
SDR Engineer (R&D)
Douglas is a research associate in the working on 5G and radio access applications. He has been key in 5G network design and installation and implementation of physical layer processing for the RFSoC.
Dr Kenny Barlee
5G SDR and RAN Engineer (KE)
Kenny is mobile network engineer developing innovative new RAN solutions. Currently working on the design and implementation of a new 5G NSA/SA network for the 5G NewThinking project, that will be used for fixed wireless access broadband, neutral host and inbound not spot roaming cellular services.
Dani Anderson
Systems Integration Engineer (KE)
Dani works on systems integration and network design using 5G disaggregated radio solutions. Currently he is working on design of 5G SA, and NB-IoT solutions using shared spectrum, across applications of transport, manufacturing, and rural connectivity.
David Northcote
FPGA Systems Designer (R&D)
David is a DSP and FPGA design engineer for wireless communication applications. He specialises in developing systems using the Xilinx RFSoC device. In 20/21 David is working with Xilinx on the RFSoC 2×2 XUP board, and creating support SDR materials for the PYNQ environment.
Tawachi Nyasulu
(PhD Researcher)
Tawachi is a PhD candidate supported by Schlumberger. Her research focus is on affordable rural internet and dynamic spectrum management; and is currently researching on RF environment modelling and radio resource allocation algorithms for dynamic spectrum access networks.
Craig Ramsay
(PhD Researcher)
Craig is a PhD student at the University of Strathclyde researching functional programming techniques for hardware description, with a focus on dependent types and DSP applications. Craig’s cat is a contributing author of the Exploring Zynq MPSoC Book — and Craig is also a co-author.
Josh Goldsmith
(PhD Researcher)
Josh is a PhD researcher working on run-time reconfigurable hardware design, specifically for FPGA-based radio applications. In 2019 he interned with Xilinx, working on RFSoC with the PYNQ team. He was also lead engineer for Project: Sandstorm in 2018.
Damien Muir
(PhD Researcher)
Damien is a PhD research currently looking at RF Compression techniques for radio frequency data, and methods for higher throughput and for RF data storage purposes.
Shruthi K.A.
(PhD Researcher 2017-20)
Shruthi is a PhD working on techno-economic analysis and game theory modelling of 5G networks. She has recently been at the International Institute of Information Technology (IIIT) Hyderabad working on 5G in rural India.
Andrew Maclellan
(PhD Researcher 2018-22)
Andrew is a PhD researcher at the University of Strathclyde researching deep learning for PHY layer wireless communications with a focus on inference on FPGAs/SoCs. In 20/21 Andrew is interning with Xilinx.
Lewis McLaughlin
(PhD Researcher 2018-22)
Lewis is a PhD researcher at the University of Strathclyde exploring the effectiveness of overlay methodologies, implemented using Pynq, within the context of Software Defined Radio (SDR) and Xilinx’ new Radio Frequency System on Chip (RFSoC).
Blair McTaggart
(PhD Researcher 2018-22)
Blair is a PhD researcher working with industry partners on SDR systems. His research involves designing an efficient FPGA implementation of a multi-element adaptive beamformer, based on the QR Decomposition algorithm.
Ehinomen Atimati
(PhD Researcher 2019-22)
Atimati is a PhD researcher at University of Strathclyde, whose research is on spectrum management automation in a shared environment for affordable broadband delivery.
Marius Šiaučiulis
(PhD Researcher 2019-23)
Marius is a PhD researcher in the team and is supported by CENSIS and Xilinx. His research is focused on FPGA accelerated SDR development for modern cellular network applications. In 20/21 Marius is interning with Xilinx.
Dennis Sonoiya
(PhD Researcher 2019-22)
Dennis is a PhD researcher with the team, and currently based in Kenya, and working alongside Strathmore University and the Communications Authority in Kenya. Dennis is working on shared spectrum solutions for rural kenya.
Shawn Kalade
AI Communications Engineer (R&D)
Shawn is a PhD researcher at the University of Strathclyde 5G cluster, researching Deep Learning techniques for Wireless Communications, specifically at the radio physical layer. He enjoys long walks on the beach and differentiable functions and interned with Xilinx in 2019/21.